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Mosfet Questions
General Physics I (PH 161)
Montgomery College
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5 MOSFET Circuits at DC 277
reader a familiarity with the device and the ability to perform MOSFET circuit analysis both
rapidly and effectively.
In the following examples, to keep matters simple and thus focus attention on the essence
of MOSFET circuit operation, we will generally neglect channel-length modulation; that is,
we will assume λ = 0. We will find it convenient to work in terms of the overdrive voltage;
VOV = VGS – Vtn for NMOS and | VOV | = VSG −
∣
∣ Vtp
∣
∣ for PMOS.
Example 5.
Design the circuit of Fig. 5: that is, determine the values of RD and RS so that the transistor operates at ID = 0 mA and VD = +0 V. The NMOS transistor has Vt = 0 V, μ nCox = 100 μA/V 2 , L = 1 μm, and W = 32 μm. Neglect the channel-length modulation effect (i., assume that λ = 0).
VDD = 2 V
VSS = 2 V Figure 5 Circuit for Example 5.
Solution
To establish a dc voltage of +0 V at the drain, we must select RD as follows:
RD =
VDD − VD
ID
=
2 − 0.
0.
= 5 k
To determine the value required for RS , we need to know the voltage at the source, which can be easily found if we know VGS. This in turn can be determined from VOV. Toward that end, we note that since VD = 0 V is greater than VG , the NMOS transistor is operating in the saturation region, and we can use the saturation-region expression of iD to determine the required value of VOV ,
ID =
1
2
μ nCox
W
L V
OV 2
Then substituting ID = 0 mA = 400 μA, μ nCox = 100 μA/V 2 , and W / L = 32/1 gives
400 =
1
2
× 100 ×
32
1
V OV 2
278 Chapter 5 MOS Field-Effect Transistors (MOSFETs)
Example 5 continued which results in
VOV = 0 V
Thus,
VGS = Vt + VOV = 0 + 0 = 1 V
Referring to Fig. 5, we note that the gate is at ground potential. Thus, the source must be at –1 V, and the required value of RS can be determined from
RS =
VS − VSS
ID
= −
1 − (−2)
0.
= 3 k
EXERCISE
D5 Redesign the circuit of Fig. 5 for the following case: VDD = – VSS = 2 V, Vt = 1 V, μ nCox = 60 μA/V 2 , W / L = 120 μm/3 μm, ID = 0 mA, and VD = +0 V. Ans. RD = 7 k; RS = 3 k
Example 5.
Figure 5 shows an NMOS transistor with its drain and gate terminals connected together. Find the i − v relationship of the resulting two-terminal device in terms of the MOSFET parameters kn = k n ′( W / L ) and Vtn. Neglect channel-length modulation (i., λ = 0 ). Note that this two-terminal device is known as a diode-connected transistor.
i
v
Figure 5.
280 Chapter 5 MOS Field-Effect Transistors (MOSFETs)
Q 2 Q 1
R 2
VDD = 1 V
R
Figure E5.
Example 5.
Design the circuit in Fig. 5 to establish a drain voltage of 0 V. What is the effective resistance between drain and source at this operating point? Let Vtn = 1 V and k ′ n ( W / L ) = 1 mA/ V 2.
ID RD
VD = 0 V
VDD = 5 V
Figure 5 Circuit for Example 5.
Solution
Since the drain voltage is lower than the gate voltage by 4 V and Vtn = 1 V, the MOSFET is operating in the triode region. Thus the current ID is given by
ID = k ′ n
W
L
[(
VGS − Vtn
)
VDS −
1
2
V DS 2
]
ID = 1 ×
[
( 5 − 1 ) × 0 −
1
2
× 0.
]
= 0 mA
5 MOSFET Circuits at DC 281
The required value for RD can be found as follows:
RD =
VDD − VD
ID
=
5 − 0.
0.
= 12 k
In a practical discrete-circuit design problem, one selects the closest standard value available for, say, 5% resistors—in this case, 12 k; see Appendix J. Since the transistor is operating in the triode region with a small VDS , the effective drain-to-source resistance can be determined as follows:
rDS =
VDS
ID
=
0.
0.
= 253
Alternatively, we can determine rDS by using the formula
rDS =
1
knVOV
to obtain
rDS =
1
1 × ( 5 − 1 )
= 0 k = 250
which is close to the value found above.
EXERCISE
5 If in the circuit of Example 5 the value of RD is doubled, find approximate values for ID and VD. Ans. 0 mA; 0 V
Example 5.
Analyze the circuit shown in Fig. 5(a) to determine the voltages at all nodes and the currents through all branches. Let Vtn = 1 V and k ′ n ( W / L ) = 1 mA/V 2. Neglect the channel-length modulation effect (i., assume λ = 0).
5 MOSFET Circuits at DC 283
which results in the following quadratic equation in ID :
18 I D 2 − 25 ID + 8 = 0
This equation yields two values for ID : 0 mA and 0 mA. The first value results in a source voltage of 6 × 0 = 5 V, which is greater than the gate voltage and does not make physical sense as it would imply that the NMOS transistor is cut off. Thus,
ID = 0 mA VS = 0 × 6 = +3 V VGS = 5 − 3 = 2 V VD = 10 − 6 × 0 = +7 V
Since VD > VG − Vtn , the transistor is operating in saturation, as initially assumed.
EXERCISES
5 For the circuit of Fig. 5, what is the largest value that RD can have while the transistor remains in the saturation mode? Ans. 12 k D5 Redesign the circuit of Fig. 5 for the following requirements: VDD = +5 V, ID = 0 mA, VS = 1 V, VD = 3 V, with a 1-μA current through the voltage divider RG 1 , RG 2. Assume the same MOSFET as in Example 5. Ans. RG 1 = 1 M; RG 2 = 3 M, RS = RD = 5 k
Example 5.
Design the circuit of Fig. 5 so that the transistor operates in saturation with ID = 0 mA and VD = +3 V. Let the PMOS transistor have Vtp = −1 V and k p ′( W / L ) = 1 mA/V 2. Assume λ = 0. What is the largest value that RD can have while maintaining saturation-region operation?
284 Chapter 5 MOS Field-Effect Transistors (MOSFETs)
Example 5 continued
VDD = 5 V
RG 1
RG 2 RD
VD = 3 V
ID = 0 mA Figure 5 Circuit for Example 5.
Solution
Since the MOSFET is to be in saturation, we can write
ID =
1
2
k ′ p
W
L
∣
∣ VOV
∣
∣ 2
Substituting ID = 0 mA and k p ′ W / L = 1 mA/V 2 , we obtain ∣ ∣ VOV
∣
∣ = 1 V
and VSG =
∣
∣ Vtp
∣
∣ +
∣
∣ VOV
∣
∣ = 1 + 1 = 2 V
Since the source is at +5 V, the gate voltage must be set to +3 V. This can be achieved by the appropriate selection of the values of RG 1 and RG 2. A possible selection is RG 1 = 2 M and RG 2 = 3 M. The value of RD can be found from
RD =
VD
ID
=
3
0.
= 6 k
Saturation-mode operation will be maintained up to the point that VD exceeds VG by
∣∣
Vtp
∣∣
; that is, until
VD max = 3 + 1 = 4 V
This value of drain voltage is obtained with RD given by
RD =
4
0.
= 8 k
286 Chapter 5 MOS Field-Effect Transistors (MOSFETs)
Example 5 continued
(c)
2 V vO
QN 10 k
IDN I
DN
2 V
(d)
2 V vO
IDP
IDP
10 k
QP
2 V
Figure 5 continued
Solution
Figure 5(b) shows the circuit for the case vI = 0 V. We note that since QN and QP are perfectly matched and are operating at equal values of
∣
∣ VGS
∣
∣ = 2 V, the circuit is symmetrical, which dictates that vO = 0 V. Thus both QN and QP are operating with
∣
∣ VDG
∣
∣ = 0 and, hence, in saturation. The drain currents can now be found from
IDP = IDN = 12 × 1 × (2 − 1 ) 2 = 1 mA
Next, we consider the circuit with vI = +2 V. Transistor QP will have a VSG of zero and thus will be cut off, reducing the circuit to that shown in Fig. 5(c). We note that vO will be negative, and thus vGD will be greater than Vtn , causing QN to operate in the triode region. For simplicity we shall assume that vDS is small and thus use
IDN ≃ k ′ n
(
Wn / Ln
)(
VGS − Vtn
)
VDS
= 1 [2 − (−2) − 1 ][ vO − (−2)]
From the circuit diagram shown in Fig. 5(c), we can also write
IDN (mA) =
0 − vO 10 (k)
5 MOSFET Circuits at DC 287
These two equations can be solved simultaneously to yield
IDN = 0 mA vO = −2 V
Note that VDS = −2 − (−2) = 0 V, which is small as assumed. Finally, the situation for the case vI = −2 V [Fig. 5(d)] will be the exact complement of the case vI = +2 V: Transistor QN will be off. Thus IDN = 0, QP will be operating in the triode region with IDP = 0 mA and vO = +2 V.
EXERCISE
5 The NMOS and PMOS transistors in the circuit of Fig. E5 are matched with k ′ n
(
Wn / Ln
)
=
k p ′
(
Wp / Lp
)
= 1 mA/V 2 and Vtn = − Vtp = 1 V. Assuming λ = 0 for both devices, find the drain currents iDN and iDP and the voltage vO for vI = 0 V, +2 V, and –2 V. Ans. vI = 0 V: 0 mA, 0 mA, 0 V; vI = + 2 V: 0 mA, 0 mA, 1 V; vI = − 2 V: 0 mA, 0 mA, –1 V
vI vO
iDN
iDP QP 10 k
QN
2 V
2 V Figure E5.
Concluding Remark If a MOSFET is conducting but its mode of operation (saturation
or triode) is not known, we assume operation in the saturation region, solve the problem,
and check whether the conditions for saturation-mode operation are satisfied. If not, then the
MOSFET is operating in the triode region and the analysis is done accordingly.
Mosfet Questions
Course: General Physics I (PH 161)
University: Montgomery College
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