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22421 - EEEEEEEEEEEEEE
Electrical engineering (EET301)
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(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate may vary but the examiner may try to assess the understanding level of the candidate. 3) The language errors such as grammatical, spelling errors should not be given more Importance (Not applicable for subject English and Communication Skills). 4) While assessing figures, examiner may give credit for principal components indicated in the figure. The figures drawn by candidate and model answer may vary. The examiner may give credit for any equivalent figure drawn. 5) Credits may be given step wise for numerical problems. In some cases, the assumed constant values may vary and there may be some difference in the candidate’s answers and model answer. 6) In case of some questions credit may be given by judgement on part of examiner of relevant answer based on candidate’s understanding. 7) For programming language papers, credit may be given to any other program based on equivalent concept.
Q.
No.
Sub Q. N.
Answer Marking Scheme
- Attempt any FIVE of the following: 10 Marks a) State 1. Duality Theorem 2. De-Morgan’s Theorem Ans: i)Duality Theorem : Duality theorem states that the dual of the Boolean function is obtained by interchanging the logical AND operator with logical OR operator and zeros with ones. For every Boolean function, there will be a corresponding Dual function. For ex x + 0 = x x = x ii)De-Morgan’s Theorem De-Morgan’s first theorem- It states that the complement of a product is equal to the sum of the individual complements. Or This theorem states that the complement of a product of variables is equal to the sum of their individual complements. i.
De-Morgan’s second theorem- It states that the complement of a sum is equal to the product of the complements. Or This theorem states that the complement of a sum of variables is equal to the product of their individual complements. i.
1 marks
1 marks
b) Draw symbol and truth table of Universal Gates. Ans:
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
i] NAND GATE Symbol Truth table:
ii] NOR GATE Symbol Truth table:
1 marks ( ½ mark for symbol & ½ mark for truth table)
1 marks ( ½ mark for symbol & ½ mark for truth table)
c) State race around condition in JK flip flop. Ans: For J-K flip-flop, if J=K=1, and if CLK =1 for a long period of time, then output Q will toggle as long as CLK remains high which makes the output unstable or uncertain. This condition is called as race around condition in JK flip-flop.
2 marks
d) Draw symbol and truth table of T type flip flop.
Ans: Symbol Truth table
OR
1 mark for symbol & 1 mark for truth table
e) Explain assemble directives. i] DB ii] EQ Ans: i] DB
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
It select Data register or command register depending on the status of RS bit If RS = 0 it will select the Command Register If RS = 1 it will select the data register
1mark
- Attempt any THREE of the following: 12 Marks a) Compare between TTL and CMOS. (any four points). Ans:
TTL CMOS
TTL stand for Transistor-Transistor Logic.
CMOS stands for Complimentary Metal- oxide Semiconductor
TTL circuit uses bipolar junction transistor.
CMOS circuit uses a field-effect transistor by connecting NMOS and PMOS
The design of the TTL is quite complex. 3. The design of the CMOS is simple.
Fan-in for TTL is 12-14. 4. Fan-in for CMOS is 10.
Propagation delay for TTL is 10ns 5. Propagation delay for CMOS is 20-50ns
Fan-out for TTL is 10 6. Fan-out for CMOS is 50
Power dissipation in TTL is 10mW 7. Power dissipation in CMOS is 1
Figure of merit is 100pJ 8. Figure of merit is 0
Clock rate for TTL is 35MHz 9. Clock rate for CMOS is 10MHz
Supply voltage is fixed 5V 10. Supply voltage is variable between 3V to 15 V
1 mark for each of any four points = 4 marks
b) Draw OR gate and AND gate using universal gates. Ans: i] OR gate using NAND gate
ii] OR gate using NOR gate
iii] AND gate using NAND gate
iv] AND gate using NOR gate
1 mark
1 mark
1 mark
1 mark
c) Design 8:1 MUX using 4:1 & 2:1 MUX. Draw Truth Table.
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
Ans:
Truth table
2 marks for diagram & 2 marks for truth table
d) Minimise the following Boolean expression using K-Map and realize it using the basic logic gates. Ans: Boolean expression is not given, so cannot solve the example. 3. Attempt any THREE of the following: 12 Marks a) Explain any four addressing modes of 8051 with one example each. Ans:
- Immediate addressing mode: In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is provided immediately after the opcode. Immediate data is given in the instruction. These are some examples of Immediate Addressing Mode. MOV R2, # 35H MOV A, #0AFH;
1 marks For each Mode
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
RL A ; rotate Left (Anticlockwise ) SJMP BACK ; keep doing
//Delay subroutine. DELAY : MOV R2,#64H H1: MOV R3,#0FFH H2: DJNZ R3, H DJNZ R2, H RET END (Note : Students can use any step sequence and delay routine. Any other correct program /diagram may please be considered )
2 marks for Correct Program
c) Compare between combinational and sequential circuits.(any four points) Ans:
Parameters Combinational Circuit Sequential Circuit Meaning and Definition
It is a type of circuit that generates an output by relying on the input it receives at that instant, and it stays independent of time.
It is a type of circuit in which the output does not only rely on the current input. It also relies on the previous ones.
Feedback A Combinational Circuit requires no feedback for generating the next output. It is because its output has no dependency on the time instance.
The output of a Sequential Circuit, on the other hand, relies on both- the previous feedback and the current input. So, the output generated from the previous inputs gets transferred in the form of feedback. The circuit uses it (along with inputs) for generating the next output. Performance We require the input of only the current state for a Combinational Circuit. Thus, it performs much faster and better in comparison with the Sequential Circuit.
In the case of a Sequential Circuit, the performance is very slow and also comparatively lower. Its dependency on the previous inputs makes the process much more complex. Complexity It is very less complex in comparison. It is because it basically lacks implementation of feedback.
This type of circuit is always more complex in its nature and functionality. It is because it implements the feedback, depends on previous inputs and also on clocks. Elementary Blocks
Logic gates form the building/ elementary blocks of a Combinational Circuit.
Flip-flops form the building/ elementary blocks of a Sequential Circuit.
1 Mark for each of any points = 4 Marks
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
Operation One can use these types of circuits for both- Boolean as well as Arithmetic operations.
You can mainly make use of these types of circuits for storing data.
d) Draw memory organization for ̅ ̅ and ̅ ̅ and explain the same. Ans:
Case of ̅̅̅̅ Case of ̅̅̅̅
Or Equivalent diagram
̅ ̅ ̅ ̅ = 0, When ̅̅̅̅ = 0 , Microcontroller access the External Program memory.
The 8051 microcontrollers ignore the internal memory and start the execution of a program stored in external memory.
̅ ̅ ̅ ̅ = 1, When ̅̅̅̅ = 1 , Microcontroller access the Internal memory
The 8051 Microcontroller executes the program form internal ROM and later the execution is continued by executing the program from additional memory.
1 mark for each diagram = 2 marks
2 marks for explanation
- Attempt any THREE of the following: 12 Marks a) Explain the following instructions: (i) DAA (ii) DIV AB (iii)CJNE A, data, rel (iv)SWAP A Ans : 1) DAA The DA instruction adjusts the eight-bit value in the Accumulator resulting from the earlier addition of two variables (each in packed-BCD format), producing two four-bit digits. This instruction is used only after the addition, to adjust the result of addition to BCD format, this instruction can not used after subtraction. The data is adjusted in following possible way : 1. If lower 4 bit of accumulator is greater than 9 or if AC = 1, then it adds 6 to lower 4 bit.
1 Marks for each Instruction = 4 Marks
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
Ans:
VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE
The von Neumann type of architecture has only one set of address and data bus for accessing data memory and Program memory
The Harvard type of architecture has separate set of address and data bus for accessing data memory and Program memory
Same physical memory address is used for instructions and data.
Separate physical memory address is used for instructions and data.
There is common bus for data and instruction transfer.
Separate buses are used for transferring data and instruction.
Two clock cycles are required to execute single instruction.
An instruction is executed in a single cycle.
It is cheaper in cost. It is costly than Von Neumann Architecture.
CPU can not access instructions and read/write at the same time.
CPU can access instructions and read/write at the same time.
It is used in personal computers and small computers.
It is used in micro controllers and signal processing.
1 marks for each of any four points = 4 Marks
c) Design Half adder using K-Map and implement using basic logic gates. Ans: Truth table
K-MAP For Sum
Sum = A’B + AB’
= A xor B
A B Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
1 mark Truth Table
1 mark for K map and Expression For Sum
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
K-map for Carry
Carry = A and B
Implementation using XOR and AND Gate:
1 mark for K map and Expression For Carry
1 mark for Implementati on
d) Realize the following equation using NAND gates only.
(i) Y = (A+B).(B+C) (ii) Y = AB + C Ans:
(Note : Marks to be given for Any other correct Realization diagram of equation)
2 marks For Each Correct Diagram = 4 marks
e) What are the alternate functions of port 3 of 8051 micro-controller?
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
Program : MOV P1,#00h //configure all lines of port P1 in output mode AGAIN: MOV P1,#00h ACALL DELAY MOV P1,#0FFh ACALL DELAY SJMP AGAIN
DELAY: MOV R1,# L2: MOV R2,# 230 L1: DJNZ R2, L DJNZ R1, L RET END (NOTE: Marks to be given for any other correct logic used by students.)
3 marks For program
5 b) Develop an ALP to arrange ten numbers stored in internal memory locations starting from 40H location in descending order.
Ans: ORG 0000H MOV R1,#09H // Counter 1 START: MOV R2,#09H // Counter 2 MOV R0,#40H // Initialize memory pointer MOV A,#00H BACK: MOV A,@R INC R MOV 0F0H,@R CJNE A,0F0H,LOC1 // Compare two numbers SJMP LOC3 //Carry will generate if A is less than B then jump else LOC1: JC LOC2 //Exchange SJMP LOC LOC2: DEC R MOV @R0,0F0H INC R0 // points to the next number MOV @R0,A LOC3: DJNZ R2,BACK //Repeat for all numbers DJNZ R1,START END
(NOTE: Marks to be given for any other correct logic used by students.)
6 marks For Correct Program
5 c) Draw architecture of 8051 Microcontroller.
Ans:
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
OR OR
OR Equivalent diagram
6 marks For correct diagram
6 Attempt any TWO of the following: 12 Marks 6 a) Explain Power saving options (i) Idle mode (ii) Power down mode Ans : (i) Idle mode: Idle mode is selected by setting IDL bit in PCON register. In the Idle mode, the internal clock signal is gated off to the CPU, but not to the Interrupt, Timer and Serial Port functions. The CPU status is preserved in its entirety, the Stack Pointer, Program Counter, Program Status Word, Accumulator, and all other registers maintain their data during Idle
3 marks For Each mode = 6 marks
(Autonomous) (ISO/IEC - 27001 - 2013 Certified)
SUMMER – 2022 EXAMINATION Subject Name: Digital Electronics and Microcontroller Applications Model Answer:
22421: DEM
6 c) Construct 3 bit asynchronous up-counter using flip-flop. Draw its timing diagram. 12 Marks Ans: 3 bit asynchronous up-counter using flip-flop:
or Equivalent diagram
Timing diagram:
Note : Marks to be given to any Correct diagram using any other type of flip flop
3 marks for Correct Diagram
3 marks Correct Timing diagram
22421 - EEEEEEEEEEEEEE
Course: Electrical engineering (EET301)
University: Rashtrasant Tukadoji Maharaj Nagpur University
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